![]() However transmitting and receiving this huge amount of data has become the system bottleneck as data needs to be transmitted in larger and larger quantities, faster and faster. Of course, this is dealt through massive parallel processing. ![]() Indeed the speed at which FPGA process information is very limited compared to the amount of data generated by high-speed data converter. And this complicates the interface between FPGA (Field Programmable Gate Array) and data converter. ![]() While SDR architecture brings many benefits in terms of flexibility and SWaP-C (Size, Weight, Power and Cost) it often translates into higher bandwidth capability and is directly linked to the data converter sampling speed with the Shannon-Nyquist theorem. The current trend for many application requiring data converters is to get closer and closer to a full SDR (Software Defined Radio) system.
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